Integral capacitors for hybrid microelectronics circuits have been known and widely used for some time. These capacitors are typically formed by a patterning a conductive region on a ceramic substrate to define a bottom electrode, depositing a thin layer of a dielectric material over the bottom electrode to form the dielectric for the capacitor, and then forming a second electrode over the dielectric, patterned to form the capacitor. Recently, the concept of forming integral capacitors has been transferred from ceramic substrates to printed circuit boards (PCB). Dielectric materials typically consist of polymers, polymers filled with ceramic materials, or pure ceramic thin films. The addition of ceramic particles to the polymer matrix increases the dielectric constant of the mixture. One type of capacitor dielectric employs a polymer filled with ceramic powder, and another type of capacitor dielectric is a high permittivity perovskite ceramic material. The ceramic filled polymers can generally be photo-defined, and provide low capacitance density (17 picofarads/mm2). They are used to form capacitors having values less than about 150 picofarads (pF). The perovskite ceramic material, however, is not photo-definable, and must be patterned using strong acids such as hydrofluoric acid or by plasma etching, and has a much higher capacitance density (3000 pF/mm2). It is generally used to form capacitors having values greater than 150 pF. Thus, these two technologies complement each other by providing a wide range of capacitor values, but the widely varying processing parameters are not compatible, and therefore prevent a combined use of the two technologies that is cost effective and allows both types of capacitor easily to be placed on the same board layer.
It would be desirable if a method could be devised wherein the ceramic filled polymer could be combined with the perovskite ceramic on the same printed circuit board layer in order to achieve a wider range of capacitance values in a compact volume and board area, and with a minimal number of process steps.